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RME User Forum → ADI-2 & 2/4 Pro series, ADI-2 DAC series → 768kHz on ADI-2 DAC FS
The datasheet of the DAC ES9028Q2M says it handles "up to 32-bit 384kHz PCM data via I2S, DSD 22.6 MHz data", so how is 768kHz supported ? What am I missing ?
In red color on page 5. 768 kHz PCM can be used with a synchronous master clock of 98 MHz.
OK, I see master clock can be up to 100MHz, but the table on page 8 still says:
serial normal mode: "MCLK=128xFSR (synchronous MCLK) with FSR <= 384kHz"
not arguing anything, 768kHz obviously works, the datasheet is confusing.
That same table on page 8 you referred asks you to refer to p34 note 2, which allow MCLK up to 100Mhz, and note 3, 128xFSR
Yes but as it writes "the maximum FSR is further limited by..", I take it as it wants to say maximum FSR (which I thought 384kHz) might be limited because MCLK is limited (by 100MHz), since other multipliers are >128. It does not say you can increase FSR as long as you stay under max MCLK. I am not an audio hardware designer so it might be only me, but I still think it is an interesting datasheet if (and it does) the DAC works even at 768kHz.
Also "MCLK=128xFSR (synchronous MCLK) with FSR <= 384kHz", is interesting. It is 128FSR when FSR<=384kHz, to me FSR>384kHz case is undefined.
In datasheet if there is a note then usually there is an exception.
RME User Forum → ADI-2 & 2/4 Pro series, ADI-2 DAC series → 768kHz on ADI-2 DAC FS
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