1 (edited by dir 2018-11-08 11:31:17)

Topic: Jitter issue on the INT clock

I was looking for behaviour of some digital transports on optical input of RME ADI-2 Pro FS.
I was notice a significant jitter raises when I set clock to INT + SRC SPDIF. It even worse than Airport Express as master.
Arta and MusicScope software are used as measurement software in 24 and 16bit modes.

Airport Express (Clock SPDIF, SRC-off):
http://i.piccy.info/i9/d52413f6802900a3550e8bf97edc8c3e/1541629362/45273/1274225/clock_spdif.png
http://i.piccy.info/i9/86c36d4aaaee2e49d6022f6417bebdf0/1541629501/40093/1274225/clock_spdif_.png



Airport Express (Clock SPDIF, SRC-on):
http://i.piccy.info/i9/4427d99efa9169ebbc08bfda48f84e40/1541629582/27961/1274225/clock_spdif_src.png
http://i.piccy.info/i9/b382d3bd07cdefb5bd1a5236cef17256/1541629840/41413/1274225/clock_spdif_srs_.png


Airport Express (Clock INT, SRC-on):
http://i.piccy.info/i9/f578beeeaef5b19d9379197261b33581/1541629995/29500/1274225/clock_int_src.png
http://i.piccy.info/i9/f089c98291e914f2732659560a118569/1541630048/46774/1274225/clock_int_srs.png


It looks same on other digital transports. Its a wrong mode maybe or I doing something wrong?

2

Re: Jitter issue on the INT clock

I have no clue what is going wrong here, and I can not reproduce these measurements.

Here is an iPad playing back the 11.025 kHz sine via a UCX in CC mode over SPDIF into the ADI-2 Pro. With external clock or SRC off the measurement looks perfect. This pic is the worst I could produce.

I also still have no clue what all this is good for, or what it is supposed to show.

http://www.rme-audio.de/images/ipad_spdif_src_int.png

Regards
Matthias Carstens
RME

3 (edited by dir 2018-11-09 21:21:40)

Re: Jitter issue on the INT clock

I was got all these pictures from SPDIF-in on ASIO inputs, not analog

Is it possible that I just have non-FS version with higher jitter? Because my paper box stll have old design without FS signature

4

Re: Jitter issue on the INT clock

Obviously my measurement is also SPDIF In, not analog (noise floor down at -170 dBFS with analog?).

If your front plate says FS then you have one. And your first two measurements look like that as well.

Regards
Matthias Carstens
RME

Re: Jitter issue on the INT clock

Thank you for your feedback. It is understdood that your measuerments was made in digital domain.


I just want to understand the differences between the modes. As far as I understand, the SRC is a prerequisite mode when turning clock to Int? When I try to record the 11 kHz jitter tone in the (Clock INT, SRC-on) mode, the level begins to "float" as a modulation product. The status of the signal was changed to 24 bits on RME display, although 16 bits are supplied though AES-in. This is not all there is if clock was switch to AES and SRC was turn-off.
http://i.piccy.info/i9/5040c1737568ddcc2384a675f7e9c42c/1541934537/22191/1274225/Untitled_1.png