Topic: Please explain the clock modes with SRC

When using the internal clock, every SRC also works as a jitter killer. However, the ADI-2 Pro is
equipped with SteadyClock FS, thus operating as perfect jitter killer with any clock source. However again, a jittery input signal might degrade the quality of the sample rate conversion. The
ADI-2 Pro therefore has a second SteadyClock exclusively for the current SRC input signal to
make the sample rate conversion process as reliable and transparent as possible.

(end of quote)

when i feed spdif input with SRC (same 44.1), i can choose clock between SPDIF or INT
so what is really changing on the DAC side?

1. spdif in 44.1 -> SRC 44.1 - > clock SPDIF
2. spdif in 44.1 -> SRC 44.1 - > clock INT

Re: Please explain the clock modes with SRC

I might be wrong, but .. MC mentioned on the forum that the ADI-2 Pro/* refreshes any clock signal that it gets and finally uses it's own clock for AD/DA conversion.

I would interpret it this way, that it doesn't make a difference whether you configure the ADI-2 Pro/DAC to get the clock either from SPDIF or from internal clock.

BR Ramses - UFX III, 12Mic, XTC, ADI-2 Pro FS R BE, RayDAT, X10SRi-F, E5-1680v4, Win10Pro22H2, Cub13

Re: Please explain the clock modes with SRC

well but my measurements shows different results with different spdif transports

Re: Please explain the clock modes with SRC

SRC is maybe different as the other clock is decoupled by the SRC.

But at the end - if we talk ie about DA conversion - it should arrive at the same circuits like all signal that become DA converted, and if this is being done by the internal clock, well then it should be performed by the internal clock.

BR Ramses - UFX III, 12Mic, XTC, ADI-2 Pro FS R BE, RayDAT, X10SRi-F, E5-1680v4, Win10Pro22H2, Cub13

Re: Please explain the clock modes with SRC

SRC stays same 44.1 but sometning is change when i make switches between spdif and int clocks