Make an ASCII drawing how the devices are connected digitally via AES and ADAT.
All devices need to be clock synchronized.
Only one clock master is allowed.
Clock master is the device using it's internal clock and sending the clock signal out through any digital output (ADAT, SPDIF, MADI,...) or Word Clock, if present/used.
All other devices have to receive the clock from the master either through a digital input which is connected to the master or by word clock, if present/used.
It's possible to clock synch the setup either completely by using digital connections or by word clock alone or a mix of both.
From operational perspective its beneficial to use the main RME interface as clock master, then the application/DAW can set the clock rate via the RME driver and in an ideal case for the whole environment.
This works best over 2ch connections like AES and SPDIF. With digital connections using SMUX (channel multiplexing), higher sample rates (double/quad speed) can not be distinguished. The protocol header has no marking for SMUX connections.
In your stup you might use the RauDAT as clock master by configuring in the driver settings clock source = internal.
Please make a drawing which shows whether and how all other devices (clock slaves) get the clock signal from the master.
They need a setting like clock source = ADAT or sometimes also called optical. Or AES or SPDIF...
In the driver settings of the clock master (RayDat) you can see the sych status if it has an inbound digital connection from a device acting as clock slave. A "lock" is not enough status synch is desired / needed. Otherwise the device is not really in synch with the master.
BR Ramses - UFX III, 12Mic, XTC, ADI-2 Pro FS R BE, RayDAT, X10SRi-F, E5-1680v4, Win10Pro22H2, Cub14